Analysis of HDI High-End Board Stack-ups: A Comprehensive Guide to 1-step, 2-step, 3-step, and AnyLayer Blind/Buried Via Technologies

Many engineers are confused about the "order" concept of HDI (High-Density Interconnect) boards, yet the criterion is extremely straightforward: the order is determined by the number of glass fiber prepreg layers a laser blind via penetrates in a single pass—one layer for 1st-order, two layers for 2nd-order, and three layers for 3rd-order. AnyLayer technology transcends this hierarchical framework by employing a sequential build-up process, enabling free interconnection between any two layers and representing the core manufacturing technique for high-end, precision PCBs.

I. 1st-Order HDI: Entry-Level Basic Process

Process Principle

The base lamination is completed first. Then, a laser drills from the outer layer through the first copper foil and dielectric layer, stopping precisely at the surface of the first inner-layer copper foil (without penetrating the copper). A single electroplating step fills the via to complete conduction. The entire process requires only “one drilling + one plating,” making it simple and efficient. It offers large alignment tolerance—minor deviations do not affect quality, ensuring high and easily controllable yield.

Applications

Commonly used in applications with low requirements for routing density and board thickness precision, such as older-generation entry-level mobile phones, standard industrial control boards, and conventional digital device motherboards.

II. 2nd-Order HDI: Dual Laser Drilling Process (Mainstream for Mid-to-High-End)

2nd-order HDI requires interconnection through two dielectric layers. Since a single laser pass cannot simultaneously ensure optimal via quality and aspect ratio, the industry commonly adopts either the staggered stacked via or aligned stacked via approach.

Staggered Stacked Via (e.g., L1–L3 interconnection)

First, drill and plate-fill the L2–L3 blind via. After lamination, drill the L1–L2 blind via, with the upper and lower vias offset from each other and non-overlapping.

Advantages: High yield and strong error tolerance.

Drawbacks: Requires reserved offset space, consuming valuable routing area.

Aligned Stacked Via (e.g., L1–L3 interconnection)

Initial steps are identical, but the second laser drilling must precisely align with the lower via, creating a vertically continuous blind via through both dielectric layers.

Core Challenge: The planarity of the first copper fill is critical—if the filled via exhibits dents or protrusions, uneven heat distribution during the second laser pass can cause incomplete drilling, breakthrough of the underlying copper foil, or via wall damage.

Quality control focuses on plating uniformity and surface polishing. Most factories struggle with low 2nd-order yields due to inadequate planarity at stacked via locations.

III. 3rd-Order HDI: The Pinnacle of Conventional HDI Technology

3rd-order HDI can penetrate three dielectric layers in a single laser pass (e.g., L1–L4) or achieve multi-layer interconnection through triple stacking, representing a significant leap in process complexity.

Two Core Challenges

Laser parameter control is extremely difficult: Insufficient energy results in incomplete dielectric ablation; excessive energy risks piercing the bottom copper foil or causing trumpet-shaped via deformation, compromising conduction reliability.

Multilayer alignment precision is highly demanding: Three drilling steps must sequentially align with inner-layer target pads, but thermal expansion, contraction, and material distortion easily induce via misalignment.

While staggered stacking reduces some challenges, the required offset space grows with layer count, severely limiting available routing area and exposing significant design constraints.

IV. AnyLayer: The Ultimate Precision Sequential Build-Up Process

AnyLayer is not a mere extension of 3rd-order HDI but represents a fundamental shift in manufacturing logic—whereas traditional HDI starts with a core substrate and adds outer layers, AnyLayer uses a sequential build-up approach: after laminating each copper layer, the process cycles through laser drilling, vacuum copper filling, electroplating, and ceramic polishing—repeated ten to twenty times—to ultimately enable unrestricted interconnection between any two layers. This technology is the undisputed choice for flagship smartphone motherboards (e.g., Apple, Huawei).

Three Major Process Challenges

Ultra-High-Precision Alignment Compensation: Each drilling step must dynamically match the original design data, requiring CCD-based real-time dimensional compensation systems to eliminate cumulative multilayer misalignment.

Zero-Defect Copper Filling and Ultra-Flat Polishing: All blind vias must be 100% void-free copper-filled, followed by ceramic polishing to achieve ultra-low surface roughness—otherwise, delamination, blistering, or peeling may occur during subsequent lamination.

Exceptional Board Thickness Uniformity: After dozens of plating, polishing, and lamination cycles, total board thickness variation must be controlled within ±5%, matching semiconductor packaging-level precision.

Cost and Advantages
AnyLayer enables ultra-thin motherboards with exceptional routing density, offering vastly superior performance and integration; however, its production cost is 3–5 times that of 1st-order HDI, with lengthy processes and extended lead times, making it suitable only for high-end precision devices.

V. Quick Comparison of the Four Technologies

Summary: The "order" fundamentally measures how many dielectric layers a blind via penetrates. Difficulty escalates from 1st- to 3rd-order, while AnyLayer revolutionizes the traditional "core-first" approach with "sequential build-up," achieving a qualitative leap in design freedom. Selection must balance performance needs, process yield, and cost budget to precisely match product positioning.